A Comparative Review on ALU using CMOS and GDI techniques for Power Dissipation and Propagation Delay


  • Rimjhim Saxena M.tech Scholar SAM college of science and technology Bhopal India
  • Kiran Sharma Asst. Professor SAM college of science and technology Bhopal India




Arithmetic and Logic Circuits are to be designed with less power, compact size, less propagation delay in this fast growing era of technology. Arithmetic operations are indispensable and the basic functions for any high speed low power applications like digital signal processing, microprocessors, image processing, etc. Consumption of power is the major issue in designing these circuits. Also the number of transistors required is also the one of the issues in designing the circuits. To minimize the transistors required in designing the circuits and to reduce the power consumption of the circuits, the authors have referred some techniques to overcome these problems in this paper. By reviewing all these techniques, the authors try to implement the GDI technique to reduce the power consumption and transistors count or the area required to design the circuits.


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How to Cite

Saxena, R., & Sharma, K. (2020). A Comparative Review on ALU using CMOS and GDI techniques for Power Dissipation and Propagation Delay. SMART MOVES JOURNAL IJOSTHE, 7(1), 19–21. https://doi.org/10.24113/ojssports.v7i1.119